Z80 8-bit load and store instructions

Background
History of CP/M
Architecture of CP/M

Using CP/M
Commands and the CCP
Programming with BDOS
The BIOS interface

The Z80 CPU
Architecture of the Z80
The Z80 instruction set

Software Tools
Installing an Emulator
Zip, ark, crunch, and urgh
Editors, Assemblers, Debuggers

Installing CP/M
Assembling a BIOS
Replacing the BDOS
Replacing the CCP

Reference
Memory Map
Data Structures
Glossary

The general method for programming the Z80 is to load data items into registers, operate on them, and then save the results back to memory. One of the most obvious ways to optimize programs that use this scheme is to carefully decide which items should remain in the CPU registers, how long they should be there, and what methods will be used to load them from memory and save them again. Therefore in programming the Z80 you should try to become very familiar with these load and store operations.

Moving Bytes between Registers

When an instruction is used to move an 8-bit byte between registers the instruction must specify which is the source register and which is the destination. These can be:

• one of the general registers: A, B, C, D, E, H, L
• one half of the index registers: IX.h, IX.l, IY.h, IY.l
• one of the hardware control registers: R, I
• an 8-bit literal value that is included in the instruction: n

Also it is worth noting that there is no way to move one byte at a time between the alternate registers A'..L' and the general registers A..L. Instead there are special instructions that swap register pairs and these are included in the 16-bit Load and Store instructions.

Loading and Storing Bytes

When loading a byte from memory the instruction has to specify the 16-bit address that the byte is coming from and the 8-bit register that the value will be loaded into. When a byte is saved to memory the address and register must also be specified by the instruction but, obviously, the data is now flowing in the opposite direction. In these load and store operations the 8-bit value can be:

• any of the general registers: A, B, C, D, E, H, L
• an 8-bit literal value that is part of the instruction: n

• a literal 16-bit address that is coded in the instruction: addr
• one of the 16-bit register pairs: BC, DE, HL
• one of the 16-bit index registers IX or IY, plus an 8-bit displacement that is in the instruction: IX+d, IY+d

It is also worth noticing that there are no PUSH or POP operations to save the contents of an 8-bit register on the stack. Only register pairs are pushed and popped! So, if you have a fragment of code that wants to use B as a temporary register and you decide to save the current value on the stack while this fragment is running, then you have to PUSH BC at the start of the code and POP BC at the end. This is one of the 16-bit Load and Store instructions.

If you want to move many bytes from one place in memory to another you should take a look at the Z80 Block Instructions. These are specially designed to be very efficient at doing this common task, and they save you the effort of having to code a routine yourself.

Instruction Table

This table gives full details of all the 8-bit load and store instructions. If you are confused by the notation that is used in the table please look at this page or you can click on the column headings to find out what each column is telling you.

Mnemonic	Symbolic Operation	S	Z	F5	H	F3	P V	N	C	Binary 76-543-210	Hex	B	M	T	Comments
LD r, r'	r := r'	.	.	.	.	.	.	.	.	01-r-r'		1	1	4
LD p, p'*	p := p'	.	.	.	.	.	.	.	.	11-011-101 01-p-p'	DD	2	2	8
LD q, q'*	q := q'	.	.	.	.	.	.	.	.	11-111-101 01-q-q'	FD	2	2	8
LD r, n	r := n	.	.	.	.	.	.	.	.	00-r-110 ------n------		2	2	7
LD p, n*	p := n	.	.	.	.	.	.	.	.	11-011-101 00-p-110 ------n------	DD	3	3	11
LD q, n*	q := n	.	.	.	.	.	.	.	.	11-111-101 00-q-110 ------n------	FD	3	3	11
LD r, (HL)	r := (HL)	.	.	.	.	.	.	.	.	01-r-110		1	2	7
LD r, (IX + d)	r := (IX + d)	.	.	.	.	.	.	.	.	11-011-101 01-r-110 ------d------	DD	3	5	19
LD r, (IY + d)	r := (IY + d)	.	.	.	.	.	.	.	.	11-111-101 01-r-110 ------d------	FD	3	5	19
LD (HL), r	(HL) := r	.	.	.	.	.	.	.	.	01-110-r		1	2	7
LD (IX + d), r	(IX + d) := r	.	.	.	.	.	.	.	.	11-011-101 01-110-r ------d------	DD	3	5	19
LD (IY + d), r	(IY + d) := r	.	.	.	.	.	.	.	.	11-111-101 01-110-r ------d------	FD	3	5	19
LD (HL), n	(HL) := n	.	.	.	.	.	.	.	.	00-110-110 ------n------	36	2	3	10
LD (IX + d), n	(IX + d) := n	.	.	.	.	.	.	.	.	11-011-101 00-110-110 ------d------ ------n------	DD 36	4	5	19
LD (IY + d), n	(IY + d) := n	.	.	.	.	.	.	.	.	11-111-101 00-110-110 ------d------ ------n------	FD 36	4	5	19
LD A, (BC)	A := (BC)	.	.	.	.	.	.	.	.	00-001-010	0A	1	2	7
LD A, (DE)	A := (DE)	.	.	.	.	.	.	.	.	00-011-010	1A	1	2	7
LD A, (nn)	A := (nn)	.	.	.	.	.	.	.	.	00-111-010 ------n------ ------n------	3A	3	4	13
LD (BC), A	(BC) := A	.	.	.	.	.	.	.	.	00-000-010	02	1	2	7
LD (DE), A	(DE) := A	.	.	.	.	.	.	.	.	00-010-010	12	1	2	7
LD (nn), A	(nn) := A	.	.	.	.	.	.	.	.	00-110-010 ------n------ ------n------	32	3	4	13
LD A, I	A := I	~	~	~	0	~	IFF.2	0	.	11-101-101 01-010-111	ED 57	2	2	9
LD A, R	A := R	~	~	~	0	~	IFF.2	0	.	11-101-101 01-011-111	ED 5F	2	2	9	R is read after it is increased.
LD I, A	I := A	.	.	.	.	.	.	.	.	11-101-101 01-000-111	ED 47	2	2	9
LD R, A	R := A	.	.	.	.	.	.	.	.	11-101-101 01-001-111	ED 4F	2	2	9	R is written after it is increased.

3-Aug-98 23:59:08