Notation for Z80 Instruction Tables


Navigation
Home
email

Background
History of CP/M
Architecture of CP/M

Using CP/M
Commands and the CCP
Programming with BDOS
The BIOS interface

The Z80 CPU
Architecture of the Z80
The Z80 instruction set

Software Tools
Installing an Emulator
Zip, ark, crunch, and urgh
Editors, Assemblers, Debuggers

Installing CP/M
Assembling a BIOS
Replacing the BDOS
Replacing the CCP

Reference
Memory Map
Data Structures
Glossary

 
addr
Where a literal address is used in an instruction this is shown as addr. This can be any 16-bit value in the range 0.. 65535. In the binary encoding the address is shown as spanning two bytes, with the lower half of the address dr in the first byte and the upper half of the address ad in the second byte.

d
Where an 8-bit offset is used in an instruction this is shown as the letter d. This offset can be in the range -128..0..+127. In the binary encoding the byte is shown as spanning all the bits 7..0.

n
Where a literal byte is used in an instruction this is shown as the letter n. The byte can contain any value and might be interpreted as an unsigned value in the range 0..255 or a signed value in the range -128..0..+127. In the binary encoding the byte is shown as spanning all the bits 7..0.

r, r'
Where one of the 8-bit general purpose registers is used in an instruction it is called r and where a second one is used it is called r'. In the binary representation the following codes are used for r:

BCDEHLA
000001010011100101111

Notice that the encoding 110 which does not appear in this table is used in the instructions that refer to (HL).

p, p', q, q'
The instructions that use the index registers IX and IY are encoded by putting a prefix byte in front of an instruction that usually refers to HL. The prefix for instructions using IX is DD and the prefix for IY is FD. By putting one of these prefixes in front of an instruction that normally moves data through the H register we end up with a composite instruction that changes the upper half of the index register (IX.h or IY.h) and by using the prefixes with an instruction that moves data through L we end with a composite instruction that changes the lower half of the index register (IX.l or IY.l). The binary representation for p is:

BCDEIX.hIX.lA
000001010011100101111

and the binary representation for q is:

BCDEIY.hIY.lA
000001010011100101111

Please note that these instructions were not originally specified by Zilog as part of the Z80 design, but they have been found to work on most Z80s that were actually built.

31-Jul-98 16:58:50




Placed in the public domain 1998. Mail any questions to cp-m@apexmail.com

1