Z80 16-bit Load and Store

Background
History of CP/M
Architecture of CP/M

Using CP/M
Commands and the CCP
Programming with BDOS
The BIOS interface

The Z80 CPU
Architecture of the Z80
The Z80 instruction set

Software Tools
Installing an Emulator
Zip, ark, crunch, and urgh
Editors, Assemblers, Debuggers

Installing CP/M
Assembling a BIOS
Replacing the BDOS
Replacing the CCP

Reference
Memory Map
Data Structures
Glossary

The general method for programming the Z80 is to load data items into registers, operate on them, and then save the results back to memory. One of the most obvious ways to optimize programs that use this scheme is to carefully decide which items should remain in the CPU registers, how long they should be there, and what methods will be used to load them from memory and save them again. Therefore in programming the Z80 you should try to become very familiar with these load and store operations.

Moving Words between Registers

When an instruction is used to move an 16-bit word between registers the instruction must specify which is the source register and which is the destination. These can be:

• one of the register pairs: AF, BC, DE, HL
• one of the alternate register pairs: AF', BC', DE', HL'
• one of the index registers: IX, IY
• the stack pointer: SP
• an 16-bit literal value that is included in the instruction

Also it is worth noting the way that register pairs are swapped with the alternate registers. There are only two instructions available: EX AF, AF' and EXX. The first one swaps 16-bits from AF (the current accumulator and the flag bits) into AF', and replaces it with whatever was in AF'. The second exchanges everything that is in BC, DE, and HL (a total of 48-bits) with their counterparts in the alternate registers. In this way the alternate registers provide a convenient and quick method for a program to switch between two operating states, but they cannot really be used as storage for 8 extra bytes because the bytes can't be accessed individually.

Because the Z80 does not have alternate index registers there are no instructions to exchange the contents of IX or IY with anything.

Loading and Storing Words

When loading a word from memory the instruction has to specify the 16-bit address that the word is coming from and the 16-bit register pair that the value will be loaded into. When a byte is saved to memory the address and register must also be specified by the instruction but, obviously, the data is now flowing in the opposite direction. In these load and store operations the 16-bit value can be:

• any of the register pairs: BC, DE, HL
• one of the index registers: IX or IY

• a literal 16-bit address that is coded in the instruction
• the stack pointer:SP

All the explicit PUSH and POP instructions of the Z80 are included in this group. Subroutine calls and interrupts implicitly push values onto the stack and the return instructions pop values back off, but the only way to use the stack for data items is with these 16-bit instructions. Any of the 16-bit register pairs or index registers can be pushed and popped and the Z80 even has special instructions to exchange the top of the stack with some of its internal registers.

If you want to move many bytes from one place in memory to another you should take a look at the Z80 Block Instructions. These are specially designed to be very efficient at doing this common task, and they save you the effort of having to code a routine yourself.

Instruction Table

This table gives full details of all the 16-bit load and store instructions. If you are confused by the notation that is used in the table please look at this page or you can click on the column headings to find out what each column is telling you.

Mnemonic	Symbolic Operation	S	Z	F5	H	F3	P V	N	C	Binary 76-543-210	Hex	B	M	T	Comments
LD dd, nn	dd := nn	.	.	.	.	.	.	.	.	00-dd0-001 -----n------ -----n------		3	3	10
LD IX, nn	IX := nn	.	.	.	.	.	.	.	.	11-011-101 00-110-001 -----n------ -----n------	DD 21	4	4	14
LD IY, nn	IY := nn	.	.	.	.	.	.	.	.	11-111-101 00-110-001 -----n------ -----n------	FD 21	4	4	14
LD HL, (nn)	L := (nn) H := (nn+1)	.	.	.	.	.	.	.	.	00-101-010 -----n------ -----n------	2A	3	5	16
LD dd, (nn)	dd.l := (nn) dd.h := (nn+1)	.	.	.	.	.	.	.	.	11-101-101 01-dd1-011 -----n------ -----n------	ED	4	6	20
LD IX, (nn)	IX.l := (nn) IX.h := (nn+1)	.	.	.	.	.	.	.	.	11-011-101 00-101-010 -----n------ -----n------	DD 2A	4	6	20
LD IY, (nn)	IY.l := (nn) IY.h := (nn+1)	.	.	.	.	.	.	.	.	11-111-101 00-101-010 -----n------ -----n------	FD 2A	4	6	20
LD (nn), HL	(nn) := L (nn+1) := H	.	.	.	.	.	.	.	.	00-100-010 -----n------ -----n------	22	3	5	16
LD (nn), dd	(nn) := dd.l (nn+1) := dd.h	.	.	.	.	.	.	.	.	11-101-101 01-dd0-011 -----n------ -----n------	DD	4	6	20
LD (nn), IX	(nn) := IX.l (nn+1) := IX.h	.	.	.	.	.	.	.	.	11-011-101 00-100-010 -----n------ -----n------	DD 22	4	6	20
LD (nn), IY	(nn) := IY.l (nn+1) := IY.h	.	.	.	.	.	.	.	.	11-111-101 00-100-010 -----n------ -----n------	FD 22	4	6	20
LD SP, HL	SP := HL	.	.	.	.	.	.	.	.	11-111-001	F9	1	1	6
LD SP, IX	SP := IX	.	.	.	.	.	.	.	.	11-011-101 11-111-001	DD F9	2	2	10
LD SP, IY	SP := IY	.	.	.	.	.	.	.	.	11-111-101 11-111-001	FD F9	2	2	10
PUSH qq	SP := SP - 1 (SP) := qq.h SP := SP - 1 (SP) := qq.l	.	.	.	.	.	.	.	.	11-qq0-101		1	3	11
PUSH IX	SP := SP - 1 (SP) := IX.h SP := SP - 1 (SP) := IX.l	.	.	.	.	.	.	.	.	11-011-101 11-100-101	DD E5	2	4	15
PUSH IY	SP := SP - 1 (SP) := IY.h SP := SP - 1 (SP) := IY.l	.	.	.	.	.	.	.	.	11-111-101 11-100-101	FD E5	2	4	15
POP qq	(SP) := qq.l SP := SP + 1 (SP) := qq.h SP := SP + 1	.	.	.	.	.	.	.	.	11-qq0-001		1	3	10
POP IX	(SP) := IX.l SP := SP + 1 (SP) := IX.h SP := SP + 1	.	.	.	.	.	.	.	.	11-011-101 11-100-001	DD E1	2	4	14
POP IY	(SP) := IY.l SP := SP + 1 (SP) := IY.h SP := SP + 1	.	.	.	.	.	.	.	.	11-111-101 11-100-001	FD E1	2	4	14
EX DE, HL	DE<->HL	.	.	.	.	.	.	.	.	11-101-011	EB	1	1	4
EX AF, AF'	AF<->AF'	.	.	.	.	.	.	.	.	00-001-000	08	1	1	4
EXX	BC<->BC' DE<->DE' HL<->HL'	.	.	.	.	.	.	.	.	11-011-001	D9	1	1	4
EX (SP), HL	(SP+1)<->H (SP)<->L	.	.	.	.	.	.	.	.	11-100-011	E3	1	5	19
EX (SP), IX	(SP+1)<->IX.h (SP)<->IX.l	.	.	.	.	.	.	.	.	11-011-101 11-100-011	DD E3	2	6	23
EX (SP), IY	(SP+1)<->IY.h (SP)<->IY.l	.	.	.	.	.	.	.	.	11-111-101 11-100-011	FD E3	2	6	23

3-Aug-98 23:16:54