Main

Contents
Overview

Connectors

Video Connector
Power Connector
Cassette Connector
Expansion Bus
Bus Description
Memory Map
Keyboard Memory Map
I/O Port Usage
DOS Internals
DOS Call addresses
LDOS Functions
Miscellaneous Info

ROM Addresses
RAM Addresses

Model 1 Internals

Model 1 Overview

The Model 1, in it's Level II BASIC configuration, consists of a Z-80 processor running at 1.77 MHz, 4 to 48K of RAM (32K of that being housed in the optional Expansion Interface), and 12K of ROM. The 16 line by 64 character video is memory mapped from 3C00H to 3FFFH. The keyboard is memory mapped from 3800H to 38FFH, using the layout in the table below. When the expansion interface is connected, there are several other items available. A printer port is memory mapped at 37E8H, with data sent to the printer on write and status available on read. The floppy disk controller takes up five addresses in the 37E0H to 37EFH, as detailed below. In addition, there is an interrupt that can be used as a time of day counter. Finally, the expansion interface allowed installation of an RS-232 communications board, though the connection was "flakey" at best.

The back of the Model 1 had four connectors. Three five pin DIN jacks that were used for Power, Video and Cassette, and a 40 pin card-edge connector that was used to connect peripherals (such as the Expansion Interface) to the computer. Pinouts of all these are listed below.

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Model 1 video connector

The TRS-80 Model 1 monitor was actually a black and white RCA television set with most of the guts taken out. Because the chassis was connected to the power mains, Radio Shack added an optical isolator to help prevent shocks. The output of the TRS-80 was 5 volts to power the optoisolator, and a standard 2 volt composite video signal. If you want to have a bigger monitor, you can wire up a DIN connector with pins 4 and 5 and connect that to the video input of your TV (or VCR or whatever).

The pin connections on the Video DIN plug are:

         2               1 - 5V dc (30ma max)
     5   o   4           4 - Composite video
      o     o            5 - Computer ground
   3 o       o 1
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Model 1 Power connector

The pin connections on the Power DIN plug are:

         2               1 - 14 VAC @ 1A transformer
     5   o   4           2 - 19.8 VDC @ 350 ma
      o     o            3 - 14 VAC @ 1A transformer
   3 o       o 1         4 - Ground
                         5 - unused

The Model 1 power supply consists of two center trapped transformers. There is a 14 volt AC transformer that goes between pins 1 and 3 of the connector. This is rated at 1 amp. Pin 4 gets the center tap of that transformer. The other transformer is half-wave rectified and Pin 2 gets approximately 19 volts DC at 350ma for the +12VDC regulator.

A simplified ASCII schematic of the Model 1 wall wart transformer is shown below:


   ________  _____________________________ Pin 1
  |        )(              
 115       )(_____________________________ Pin 4
 vac       )(
  |________)(_____________________________ Pin 3
            
                 1N4000
            (----->|-----------------*---- Pin 2   
            (                        |
            (-----------> to pin 4   |
            (                        |
            (----->|-----------------
                 1N4000
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Model 1 Cassette Connector

The pin connections on the Cassette plug are:

         2               1 - Motor relay
     5   o   4           2 - Ground
      o     o            3 - Motor relay
   3 o       o 1         4 - Cassette In
                         5 - Cassette Out

The Motor relay contacts connect to the remote control jack on the cassette to turn the motor on and off (duh!). Cassette In goes to the earphone jack of the recorder. Cassette Out should go to the Aux jack of the recorder, if it has one. If not, to the mic connector. The level may be a little high if you have to go through a microphone input, though.

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40 Pin Expansion Connector

The Model 1 has a 40 pin bus connector on the left rear of the case, which allows connecting various peripherals. It is mainly used for the Expansion Interface, a box containing an additional 16 or 32K of RAM, a floppy disk controller, a printer port, and possibly an RS-232 port.

The expansion bus pinout is as follows:

Pin (hex) Sig Name Description
1 RAS* Row Address Strobe output for 16 pin dynamic rams
2 SYSRES* System reset output. Low during power-up initialize or when the reset button is pressed
3 CAS* Column Address Strobe output for 16 pin dynamic rams
4 A10 Address output
5 A12 Address output
6 A13 Address output
7 A15 Address output
8 GND Signal Ground
9 A11 Address output
10 A14 Address output
11 A8 Address output
12 OUT* Peripheral Write strobe output
13 WR* Memory Write strobe output
14 INTAK* Interrupt Acknowledge output
15 RD* Memory Read strobe output
16 MUX Multiplexer Control output for 16 pin dynamic RAMs
17 A9 Address output
18 D4 Bidirectional data bus
19 IN* Peripheral Read strobe output
20 D7 Bidirectional data bus
21 INT* Interrupt input (Maskable)
22 D1 Bidirectional data bus
23 TEST* A logic 0 on TEST* input tri-states A0-A15, D0-D7, WR*, RD*, IN*, OUT*, RAS*, CAS* and MUX*.
24 D6 Bidirectional data bus
25 A0 Address output
26 D3 Bidirectional data bus
27 A1 Address output
28 D5 Bidirectional data bus
29 GND Signal ground
30 D0 Bidirectional data bus
31 A4 Address output
32 D2 Bidirectional data bus
33 WAIT* Processor wait input, to allow for slow memory
34 A3 Address output
35 A5 Address output
36 A7 Address output
37 GND Signal ground
38 A6 Address output
39 +5V (limited current - Level I Model 1s only)
40 A2 Address output

Expansion Bus Card Edge Connector as viewed from the rear of the computer.

  1  3  5  7  9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
 -#--#--#--#--#--#--#--#--#--#--#--#--#--#--#--#--#--#--#--#-
  2  4  6  8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

Explanation of Expansion Bus signals

Address Output: There are 16 address lines, labeled A0 through A15. A0 is the least significant bit, while A15 is the most significant bit. These lines are the address bus from the Z80 microprocessor. Each line is capable of driving ONE standard TTL load.

Bi-directional Data Bus These eight lines, D0 through D7, are what the CPU uses to move data from one part of the computer to another. D0 is the least significant bit, while D7 is the most significant.

Row Address Strobe output The RAS* line goes low when the CPU is outputting the row portion of an address. Used for accessing dynamic RAM.

Column Address Strobe output The CAS* line goes low when the CPU is outputting the column portion of an address. Used for accessing dynamic RAM.

Multiplexer Control output The MUX output is used to select the proper address line in conjunction with RAS* and CAS* for accessing the RAM.

System Reset output The SYSRES* output goes low only when the RESET button is pressed, or when the computer is first powered up. This can be used to reset an external device at the same time the TRS-80 is reset.

Test input When the TEST* line is taken low, the data, address and control group buffers will tri-state. That is, they will be disconnected from the rest of the world. This is normally only used during factory testing or during troubleshooting.

Processor Wait When taken low, WAIT* will pause the CPU from firther processing until WAIT* goes back high. In some cases, an external device will need additional time to send data to the processor. The WAIT* input allows the external device to take the time it needs.

Memory Write strobe When *WR goes low, the CPU is writing the data present on the data bus to the memory location specified by the address bus.

Memory Read strobe When *RD goes low, the CPU is reading data present on the data bus from the memory location specified by the address bus.

Peripheral Write strobe OUT* operates like WR*, except that it is for port output instead of memory write. When OUT* goes low, the CPU is trying to send the 8 bit data on the data bus to the I/O port specified by the 8 low order bits of the address bus (A0 through A7). The Model 1 can address up to 256 output ports.

Peripheral Read strobe IN* operates much like RD*, except it is for input ports instead of RAM memory. When IN* goes low, the CPU is looking for data at the port address specified by the low 8 bits (A0-A7) of the address bus. The Model 1 can address up to 256 input ports.

Interrupt input INT*, when taken low, will force the CPU to a predetermined address in the computer's ROM. Although the Z80 CPU allows several interrupt modes, there is only one available on the TRS-80, the jump to 0038H.

Interrupt Acknowledge INTAK* goes low whenever the the CPU enters an interrupt mode.

Signal Ground This is the reference point for all voltages and logic levels in the Model 1.

+5 volt output This line is at +5V only on Level 1 Model 1s. On Level II machines, this pin has been modified to be GROUND.

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Model 1 Memory Map

The Model 1's Memory Map included the BASIC ROM, Memory mapped I/O regions for the keyboard, printer and floppy disks, video RAM, and system RAM. The table below shows the address ranges for each of these.

Address (hex) Description
0000-2FFF Level II ROM
3000-37DF Unused
37E0-37FF Memory Mapped I/O
3800-38FF Keyboard map
3900-3BFF (Keyboard 'shadow'ed here)
3C00-3FFF 1kb Video RAM
4000-41FF RAM used by the ROM routines
4200-7FFF Usable RAM in a 16K machine
8000-BFFF Additional RAM in a 32K machine
C000-FFFF Still more in a 48K machine

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Model 1 Keyboard Memory Map

The Model 1 keyboard was memory mapped from addresses 3801H through 3880H. The table below details each address and the keys that were mapped to them.

Address (HEX) Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
3801 @ A B C D E F G
3802 H I J K L M N O
3804 P Q R S T U V W
3808 X Y Z
3810 0 1 2 3 4 5 6 7
3820 8 9 * + < = > ?
3840 Enter Clear Break Up Down Left Right Space
3880 Shift ***** Control

Notes on the table:

  • Only unshifted values are in the table. For the characters that correspond to the shifted keys, consult your Model 1 or 3 keyboard.
  • Blank entries are not used.
  • The BREAK key can not be used in BASIC programs.
  • It is entirely possible to check for multiple keys at once, at the same address. "H" and "I" pressed at the same time would give the value of 3 at address 3802H.
  • It is also possible to combine more than one address. Add the low bytes of the desired row addresses together, and add that value to 3800H to find the address to peek. For example, to check if either "H" or "X" is pressed, check address 380AH for a value of 1.
  • The box marked ***** shows the address and bit used on the Model 3 to decode the right shift key separately from the left shift key.
  • Electric Pencil used the "Control" key at 3880H. It wasn't a standard Model 1 or 3 key, though.
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Model 1 I/O Ports

The Model 1 used only two I/O ports. The cassette port was at 0FFH and the serial port mapped from 0E8H to 0EBH.

Thanks to Robert Brooks, we now have a nice table showing the Model 1 Port assignments. Thanks much, Robert.

Port Bits Description
E8 (read)Modem Status
0RX data (pin 3 of DB-25)
1-3Unused
4Ring Indicator
5Carrier Detect
6DSR
7CTS
E8(write)Master reset
0-7Any data to port resets the TR1602
E9 (read)Configuration switches (M1 only)
0-2Baud rate select:
000 = 110100 = 1200
001 = 150101 = 2400
010 = 300110 = 4800
011 = 600111 = 9600
31 = enable parity 0 = disable
41 = 2 stop bits 0 = 1 stop
5-6Word Length:
00=5 01=6 10=7 11=8
71 = Even parity 0 = Odd
E9(write)Baud rate set
0-3TX baud set
4-7RX baud set
EA (read)UART Status
0-2Unused
31 if parity error
41 if framing error
51 if overrun error
61 if TX register empty
71 if RX register full
EA(write)UART Control
0DTR signal
1RTS signal
2Break: 0 inhibits data tx
3Parity enable: 1=enabled
4Stop bits: 0=1 bit 1=2 bits
5-6Word Length:
00=5 01=6 10=7 11=8
7Parity: 0=Odd 1=Even
EB (r/w)RS232 Data in/out
0-7Data
FF (r/w)Cassette and Video control
0-1Cassette voltage level
2Cassette Motor on/off
364/32 character mode
4-7Unused
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Model 1 DOS Internals

These are rather large to put here. Please use the links below to see this information.

Model 1 and 3 DOS Call addresses

Model 1 LDOS Functions

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Miscellaneous

Miscellaneous info goes here... when I get time.

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The TRS-80 Home Page created and maintained by Pete Cervasio
cervasio@airmail.net

Copyright © 1998 Pete Cervasio