module loadseq
"Flash ROM loader
"Project 109 (MEDUSA)
" D-X Designs  Sept. 1995
" David R. Brooks
"
"Clock
        tck     pin;
"Inputs
        tms,            "Mode select
        cmnd,           "Latched command bit
        tdi     pin;    "Serial data in (final cmnd. bit)
"Outputs
        gcd,
        wrs,
        rds,
        shiftcmnd,      "Shift TDI into command reg.
        shiftaddress,   "Shift into ROM address reg.
        bumpaddress,    "Increment ROM address
        shiftdata,      "Shift in/out of data reg.
        oes,            "Output drive for writing
        write,          "Write strobe to ROM
        read    pin;    "Read enable for ROM
"State Declarations
        sbit    state_register  istype  'reg_D';
        idle,
        getcmd,
        loadaddr,
        nextaddr,
        wrshift,
        writeit,
        wrpause,
        readit,
        rdshift STATE;
xilinx property 'Initialstate idle';
Equations
        sbit.clk        = tck;
        shiftcmnd       = (idle);
        shiftaddress    = (loadaddr);
        bumpaddress     = (nextaddr);
        shiftdata       = (wrshift # rdshift);
        oes             = (wrshift & tms);
        write           = (writeit);
        read            = (readit);
        gcd             = (getcmd);
        wrs             = (wrshift);
        rds             = (rdshift);
        State_Diagram sbit
State idle:     if (tms) then idle else getcmd;
State getcmd:   if (!tms) then getcmd
                else if (tms & !cmnd & !tdi) then loadaddr
                else if (tms & !cmnd &  tdi) then nextaddr
                else if (tms &  cmnd & !tdi) then wrshift
                else if (tms &  cmnd &  tdi) then readit;
State loadaddr: if (tms) then idle else loadaddr;
State nextaddr: goto idle;
State wrshift:  if (tms) then writeit else wrshift;
State writeit:  goto wrpause;
State wrpause:  goto idle;
State readit:   goto rdshift;
State rdshift:  if (tms) then idle else rdshift;
end